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<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Instructors: Kyle Shiflett and Avinash Karanth<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Credit Hours: 3<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">EE 4900/5900 is intended to introduce students to basic deep neural networks, and provide an indepth<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">study of computer architecture methods for efficient training and inference of deep neural<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">networks. The recent proliferation of artificial intelligence, in particular deep neural networks<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">(DNNs), has led to an increasing pressure on hardware systems that run these models. DNNs<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">have established some of the leading state-of-the-art models for tasks such as image classification<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">and speech recognition, some even achieving super-human accuracy. As the size and complexity<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">of DNN models continue to grow, as does the need for energy-efficient and fast execution of these<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">workloads. This course focuses on recent computer architecture trends and hardware-software<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">co-design techniques that facilitate efficient execution of DNNs.<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Topics covered in this course include:<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Multilayer perceptrons<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Convolutional neural networks<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Affine and nonlinear integer quantization<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Operand dataflow and stationarity<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Hardware accelerators<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Compression with sparsity and pruning<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Memory organization<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Interconnects<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;font-family:SFRM1200">• </span>
<span style="font-size:12.0pt;font-family:CMR12">Training</span><o:p></o:p></p>
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<div class="WordSection1">
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Instructors: Kyle Shiflett and Avinash Karanth<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Credit Hours: 3<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">EE 4900/5900 is intended to introduce students to basic deep neural networks, and provide an indepth<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">study of computer architecture methods for efficient training and inference of deep neural<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">networks. The recent proliferation of artificial intelligence, in particular deep neural networks<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">(DNNs), has led to an increasing pressure on hardware systems that run these models. DNNs<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">have established some of the leading state-of-the-art models for tasks such as image classification<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">and speech recognition, some even achieving super-human accuracy. As the size and complexity<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">of DNN models continue to grow, as does the need for energy-efficient and fast execution of these<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">workloads. This course focuses on recent computer architecture trends and hardware-software<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">co-design techniques that facilitate efficient execution of DNNs.<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:CMR12">Topics covered in this course include:<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Multilayer perceptrons<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Convolutional neural networks<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Affine and nonlinear integer quantization<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Operand dataflow and stationarity<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Hardware accelerators<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Compression with sparsity and pruning<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Memory organization<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:SFRM1200">•
</span><span style="font-size:12.0pt;font-family:CMR12">Interconnects<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;font-family:SFRM1200">• </span>
<span style="font-size:12.0pt;font-family:CMR12">Training</span><o:p></o:p></p>
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