BEGIN:VCALENDAR METHOD:REQUEST PRODID:Microsoft Exchange Server 2010 VERSION:2.0 BEGIN:VTIMEZONE TZID:Eastern Standard Time BEGIN:STANDARD DTSTART:16010101T020000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;INTERVAL=1;BYDAY=1SU;BYMONTH=11 END:STANDARD BEGIN:DAYLIGHT DTSTART:16010101T020000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;INTERVAL=1;BYDAY=2SU;BYMONTH=3 END:DAYLIGHT END:VTIMEZONE BEGIN:VEVENT ORGANIZER;CN="Hunter, Tiffany":mailto:huntert1@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN=Furkan Can an:mailto:furkancanan@hotmail.com ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Abukamail, Nasseef":mailto:abukamai@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Allwine, D aniel":mailto:allwined@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Bartone, C hris":mailto:bartone@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Chenji, Ha rsha":mailto:chenji@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Goble, Jam es":mailto:goble@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Irwin, Den nis":mailto:irwind@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Jadwisienc zak, Wojciech":mailto:jadwisie@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Karanth, A vinash":mailto:karanth@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Kaya, Sava s":mailto:kaya@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Kelsey, Ra lph":mailto:kelsey@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Liu, Chang" :mailto:liuc@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Liu, Jundo ng":mailto:liuj1@ohio.edu ATTENDEE;ROLE=REQ-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Mourning, Chad":mailto:mourning@ohio.edu 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ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Yuan, Weiq iang":mailto:wy818711@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Gant, Ian": mailto:ig622218@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Bragg, Ang ie":mailto:ab824022@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Barat, Aak riti":mailto:ab613319@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Lele, Kal": mailto:kl121916@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Flaherty, Aidan":mailto:af674321@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Agyeman, A mos":mailto:aa852712@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Marusek, J osh":mailto:jm553020@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Spelic, As hley":mailto:as182219@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Chauhan, S aumya":mailto:sc357320@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Taylor, Za ch":mailto:zt133220@ohio.edu ATTENDEE;ROLE=OPT-PARTICIPANT;PARTSTAT=NEEDS-ACTION;RSVP=TRUE;CN="Byreddy, P ranay":mailto:pb972315@ohio.edu DESCRIPTION;LANGUAGE=en-US:Title: Designing novel gate work function engine ered FinFETs for CMOS scaling\, hardware security and neuromorphic computi ng\n\nAbstract: Scaling CMOS logic circuits to build low power and compact devices has utmost importance in modern CMOS technology. Schottky Barrier FinFET transistors can offer a solution for sub 10nm transistor design as it affects the process minimally. Gate workfunction engineered Schottky B arrier FinFETs can be used to minimize the number of transistors used in a CMOS digital circuit\, making it power and area efficient while staying c ompetitive for power delay product. Characterization of Schottky Barrier F inFETs for very large system integration involves different steps from dev ice level to system level abstraction. Gate work function engineered Schot tky Barrier FinFETs can also be utilized to build multi input logic circui ts and fine grain reconfigurable logic circuits which are especially impor tant for hardware security applications. Extending the idea of gate work f unction engineering to tunneling transistors can lead to ultra low power a nd ultra fast green transistors reaching beyond 60mV/decade thermodynamic limit of thermionic emission. For the future research work\, gate work fun ction engineered SiGe based tunneling FETs may be useful for in-memory com puting in the area of neuromorphic computing.\n\nBio: Talha Furkan Canan r eceived the B.S. degree from Department of Electrical and Electronics Engi neering\, Bilkent University\, Ankara\, Turkey\, in 2015. Following his wo rk as research engineer in CAD modelling of GaN HEMT devices at the Nanote chnology Research Center in Bilkent University\, he joined Ohio University in 2016 to commence his Ph.D. work on nano-scale CMOS integrated systems\ , logic devices and interconnects for kilocore computing architectures. He prepared his dissertation on "Design of Ultra-Compact and Low-Power sub-1 0 Nanometer Logic Circuits with Schottky Barrier Contacts and Gate Work-Fu nction Engineering". After receiving his Ph.D. degree\, he joined Sony Ele ctronics Image Sensor Design Center and worked on different technical proj ects related with unit pixel scaling\, single photon avalanche photodiode design\, conversion gain improvement and optical characterization of image sensors. His research interests include design of ultra low power and com pact logic circuits\, tunneling transistors\, III-V and III-N semiconducto r devices\, CMOS image sensors\, avalanche photodiodes\, hardware security \, thin-film transistors and hot electron and ionization diodes. Dr. Canan is an expert on semiconductor electronics and device simulations with mor e than ten years of professional experience. He was a recipient of G.E. Sm ith and G.V. Smith Memorial Engineering Award for Electrical Engineering a nd Computer Science Department at Ohio University at 2021 and Nanoscale Qu antum Phenomenon Institute Award at 2019. Currently\, he has one patent an d twelve publications including five journal papers.\n____________________ ____________________________________________________________\nMicrosoft Te ams Need help?
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